Difference between revisions of "Fetch Decode Execute Cycle"
(→Fetch Decode Execute Cycle) |
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| Line 6: | Line 6: | ||
[PC] → MAR | [PC] → MAR | ||
| − | [Memory | + | [Memory<sub>MAR</sub>] → MBR |
[PC] + 1 → PC | [PC] + 1 → PC | ||
| Line 16: | Line 16: | ||
The address of the next instruction to be executed is copied from the Program Counter to the Memory Address Register. | The address of the next instruction to be executed is copied from the Program Counter to the Memory Address Register. | ||
| − | The instruction at that address is then copied to the Memory Buffer Register. | + | The instruction at that address (stored in the Memory Address Register) is then copied to the Memory Buffer Register. |
Simultaneously, the contents of the Program Counter are incremented by 1. | Simultaneously, the contents of the Program Counter are incremented by 1. | ||
| Line 30: | Line 30: | ||
[CIR<sub>operand</sub>] → MAR | [CIR<sub>operand</sub>] → MAR | ||
| − | [Memory | + | [Memory<sub>MAR</sub>] → MBR |
[MBR] → A-reg | [MBR] → A-reg | ||
| Line 36: | Line 36: | ||
The operand of the instruction in the Current Instruction Register is copied into the Memory Address Register. | The operand of the instruction in the Current Instruction Register is copied into the Memory Address Register. | ||
| − | The contents of the Memory address are fetched into the Memory Buffer Register. | + | The contents of the Memory address (stored in the Memory Address Register) are fetched into the Memory Buffer Register. |
Because it is a LOAD the Memory Buffer Register is copied into the A-reg (Accumulator). | Because it is a LOAD the Memory Buffer Register is copied into the A-reg (Accumulator). | ||
| Line 43: | Line 43: | ||
[CIR<sub>operand</sub>] → MAR | [CIR<sub>operand</sub>] → MAR | ||
| − | [Memory | + | [Memory<sub>MAR</sub>] → MBR |
[MBR] + A-reg → A-reg | [MBR] + A-reg → A-reg | ||
| Line 49: | Line 49: | ||
The operand of the instruction in the Current Instruction Register is copied into the Memory Address Register. | The operand of the instruction in the Current Instruction Register is copied into the Memory Address Register. | ||
| − | The contents of the Memory address are fetched into the Memory Buffer Register. | + | The contents of the Memory address (stored in the Memory Address Register) are fetched into the Memory Buffer Register. |
Because it is a ADD the Memory Buffer Register is added to the current value of the A-reg (Accumulator), and then copied into the A-reg (Accumulator). | Because it is a ADD the Memory Buffer Register is added to the current value of the A-reg (Accumulator), and then copied into the A-reg (Accumulator). | ||
| Line 60: | Line 60: | ||
===Explanation=== | ===Explanation=== | ||
| + | The operand from the instruction currently in the Current Instruction Register is copied into the Memory Address Register. | ||
| + | |||
| + | The current value in the A-reg (Accumulator) is copied into the Memory Buffer Register. | ||
| + | |||
| + | The value in the Memory Buffer Register is copied to the memory address (stored in the Memory Address Register) in the Memory. | ||
Revision as of 08:35, 16 June 2017
Contents
Fetch Decode Execute Cycle
Fetch Transfer Notation
[PC] → MAR
[MemoryMAR] → MBR
[PC] + 1 → PC
[MBR] → CIR
Explanation
The address of the next instruction to be executed is copied from the Program Counter to the Memory Address Register.
The instruction at that address (stored in the Memory Address Register) is then copied to the Memory Buffer Register.
Simultaneously, the contents of the Program Counter are incremented by 1.
The contents of the Memory Buffer Register are copied to the Current Instruction Register.
Decode Transfer Notation
[CIRop-code] → CU
Explanation
The op code from the CIR is passed to the Control Unit
Execute Transfer Notation (LOAD)
[CIRoperand] → MAR [MemoryMAR] → MBR [MBR] → A-reg
Explanation
The operand of the instruction in the Current Instruction Register is copied into the Memory Address Register.
The contents of the Memory address (stored in the Memory Address Register) are fetched into the Memory Buffer Register.
Because it is a LOAD the Memory Buffer Register is copied into the A-reg (Accumulator).
Execute Transfer Notation (ADD)
[CIRoperand] → MAR [MemoryMAR] → MBR [MBR] + A-reg → A-reg
Explanation
The operand of the instruction in the Current Instruction Register is copied into the Memory Address Register.
The contents of the Memory address (stored in the Memory Address Register) are fetched into the Memory Buffer Register.
Because it is a ADD the Memory Buffer Register is added to the current value of the A-reg (Accumulator), and then copied into the A-reg (Accumulator).
Execute Transfer Notation (STORE)
[CIRoperand] → MAR A-reg → MBR [MBR] → MemoryMAR
Explanation
The operand from the instruction currently in the Current Instruction Register is copied into the Memory Address Register.
The current value in the A-reg (Accumulator) is copied into the Memory Buffer Register.
The value in the Memory Buffer Register is copied to the memory address (stored in the Memory Address Register) in the Memory.
