Difference between revisions of "Assembly Language"

From TRCCompSci - AQA Computer Science
Jump to: navigation, search
(→‎Op Codes)
Line 9: Line 9:
 
===LDR - Load===
 
===LDR - Load===
 
This instruction is to load a value stored in memory into a CPU register.
 
This instruction is to load a value stored in memory into a CPU register.
 +
 +
LDR Rd, <memory ref>
  
 
===STR - Store===
 
===STR - Store===
−
This instruction is to store a value from a register into memory.
+
This instruction is to store a value from Register d into Memory location <memory ref>.
 +
 
 +
STR Rd, <memory ref>
  
 
===ADD - Add===
 
===ADD - Add===
−
Operation used to add two numbers together
+
Operation used to add two numbers together, the value in the operand to the value in Register n.
 +
 
 +
The output is stored in Register d
 +
 
 +
ADD Rd, Rn, <operand>
  
 
===SUB - Subtract===
 
===SUB - Subtract===
−
operation used to subtract two numbers from each other
+
operation used to subtract two numbers from each other, the value in the operand from the value in Register n.
 +
 
 +
The output is stored in Register d
 +
 
 +
SUB Rd, Rn, <operand>
  
 
===MOV - Move===
 
===MOV - Move===
−
This instruction is to copy a value into a register.
+
This instruction is to copy a value into a register. The value from the operand is stored in Register d
 +
 
 +
MOV Rd, <operand>
  
 
===CMP - Compare===
 
===CMP - Compare===
−
The CMP instruction compares two operands. It is generally used in conditional execution.
+
The CMP instruction compares two operands. It is generally used in conditional execution and is needed if you wish to do a conditional branch. It compares the operand with the Register n.
 +
 
 +
CMP Rn, <operand>
  
 
===B - Branch===
 
===B - Branch===
 +
This will always branch to the instruction at position <label> in the program.
 +
 +
B <label>
 +
 
===BEQ - Branch If Equal===
 
===BEQ - Branch If Equal===
 +
This must follow a CMP, and if the CMP values are equal this OpCode will branch to the specified <label>
 +
 +
BEQ <label>
 +
 
===BNE - Branch If Not Equal===
 
===BNE - Branch If Not Equal===
 +
This must follow a CMP, and if the CMP values are not equal this OpCode will branch to the specified <label>
 +
 +
BNE <label>
 +
 
===BGT - Branch If Greater Than===
 
===BGT - Branch If Greater Than===
 +
This must follow a CMP, and if the CMP values are Greater Than this OpCode will branch to the specified <label>
 +
 +
BGT <label>
 +
 
===BLT - Branch If Less Than===
 
===BLT - Branch If Less Than===
 +
This must follow a CMP, and if the CMP values are Less Than this OpCode will branch to the specified <label>
 +
 +
BLT <label>
 +
 
===AND - Bitwise And===
 
===AND - Bitwise And===
 +
This OpCode will perform a bitwise logical AND between the values in Register n and the <operand>.
 +
 +
This will compare both inputs, it will output a 1 for each bit when both inputs are a 1. All other outputs will be a 0
 +
 +
The result is stored in Register d
 +
 +
AND Rd, Rn, <operand>
 +
 
===ORR - Bitwise Or===
 
===ORR - Bitwise Or===
 +
This OpCode will perform a bitwise logical OR between the values in Register n and the <operand>.
 +
 +
This will compare both inputs, it will output a 1 for each bit when either inputs are a 1. All other outputs will be a 0
 +
 +
The result is stored in Register d
 +
 +
ORR Rd, Rn, <operand>
 +
 
===EOR - Bitwise Xor===
 
===EOR - Bitwise Xor===
 +
This OpCode will perform a bitwise logical XOR between the values in Register n and the <operand>.
 +
 +
This will compare both inputs, it will output a 1 for each bit when either but not both inputs are a 1. All other outputs will be a 0
 +
 +
The result is stored in Register d
 +
 +
EOR Rd, Rn, <operand>
 +
 
===MVN - Bitwise Not===
 
===MVN - Bitwise Not===
 +
This OpCode will perform a bitwise logical NOT between the value in the <operand>.
 +
 +
This will negate the input by swapping all 1's for 0's, and 0's for 1's
 +
 +
The result is stored in Register d
 +
 +
MVN Rd, <operand>
 +
 
===LSL - Logical Shift Left===
 
===LSL - Logical Shift Left===
 +
 +
LSL Rd, Rn, <operand>
 +
 
===LSR - Logical Shift Right===
 
===LSR - Logical Shift Right===
 +
 +
LSR Rd, Rn, <operand>
 +
 
===HLT - Halt Program===
 
===HLT - Halt Program===
 
Causes the processor to stop executing your program.
 
Causes the processor to stop executing your program.
 +
 +
HLT

Revision as of 09:03, 16 June 2017

Operands

The operand can be interpreted in two different ways, if it uses:

  • # it refers to a specific value to use
  • Rm uses the value stored in register m

Op Codes

Below is a list of the OpCodes used within your examinations. This table will always be given to you with a small explanation and syntax for each command.

LDR - Load

This instruction is to load a value stored in memory into a CPU register.

LDR Rd, <memory ref>

STR - Store

This instruction is to store a value from Register d into Memory location <memory ref>.

STR Rd, <memory ref>

ADD - Add

Operation used to add two numbers together, the value in the operand to the value in Register n.

The output is stored in Register d

ADD Rd, Rn, <operand>

SUB - Subtract

operation used to subtract two numbers from each other, the value in the operand from the value in Register n.

The output is stored in Register d

SUB Rd, Rn, <operand>

MOV - Move

This instruction is to copy a value into a register. The value from the operand is stored in Register d

MOV Rd, <operand>

CMP - Compare

The CMP instruction compares two operands. It is generally used in conditional execution and is needed if you wish to do a conditional branch. It compares the operand with the Register n.

CMP Rn, <operand>

B - Branch

This will always branch to the instruction at position <label> in the program.

B <label>

BEQ - Branch If Equal

This must follow a CMP, and if the CMP values are equal this OpCode will branch to the specified <label>

BEQ <label>

BNE - Branch If Not Equal

This must follow a CMP, and if the CMP values are not equal this OpCode will branch to the specified <label>

BNE <label>

BGT - Branch If Greater Than

This must follow a CMP, and if the CMP values are Greater Than this OpCode will branch to the specified <label>

BGT <label>

BLT - Branch If Less Than

This must follow a CMP, and if the CMP values are Less Than this OpCode will branch to the specified <label>

BLT <label>

AND - Bitwise And

This OpCode will perform a bitwise logical AND between the values in Register n and the <operand>.

This will compare both inputs, it will output a 1 for each bit when both inputs are a 1. All other outputs will be a 0

The result is stored in Register d

AND Rd, Rn, <operand>

ORR - Bitwise Or

This OpCode will perform a bitwise logical OR between the values in Register n and the <operand>.

This will compare both inputs, it will output a 1 for each bit when either inputs are a 1. All other outputs will be a 0

The result is stored in Register d

ORR Rd, Rn, <operand>

EOR - Bitwise Xor

This OpCode will perform a bitwise logical XOR between the values in Register n and the <operand>.

This will compare both inputs, it will output a 1 for each bit when either but not both inputs are a 1. All other outputs will be a 0

The result is stored in Register d

EOR Rd, Rn, <operand>

MVN - Bitwise Not

This OpCode will perform a bitwise logical NOT between the value in the <operand>.

This will negate the input by swapping all 1's for 0's, and 0's for 1's

The result is stored in Register d

MVN Rd, <operand>

LSL - Logical Shift Left

LSL Rd, Rn, <operand>

LSR - Logical Shift Right

LSR Rd, Rn, <operand>

HLT - Halt Program

Causes the processor to stop executing your program.

HLT

Retrieved from ‘http://www.trccompsci.online/mediawiki/index.php?title=Assembly_Language&oldid=3041’